Texas Instruments MSP430x4xx - Manual (Page 45)

Addressing Modes
3-11 RISC 16-Bit CPU
3.3.2 Indexed Mode
The indexed mode is described in Table 3−5.
Table 3−5. Indexed Mode Description
Assembler Code Content of ROM
MOV 2(R5),6(R6) MOV X(R5),Y(R6)
X = 2
Y = 6
Length: Two or three words
Operation: Move the contents of the source address (contents of R5 + 2)
to the destination address (contents of R6 + 6). The source
and destination registers (R5 and R6) are not affected. In
indexed mode, the program counter is incremented
automatically so that program execution continues with the
next instruction.
Comment: Valid for source and destination
Example: MOV 2(R5),6(R6);
00006h
Address
Space
00002h
04596h PC
0FF16h
0FF14h
0FF12h
0xxxxh
05555h
01094h
01092h
01090h 0xxxxh
0xxxxh
01234h
01084h
01082h
01080h 0xxxxh
01080h
0108Ch
R5
R6
0108Ch
+0006h
01092h
01080h
+0002h
01082h
Register
Before:
00006h
Address
Space
00002h
04596h
PC
0FF16h
0FF14h
0FF12h
0xxxxh
01234h
01094h
01092h
01090h 0xxxxh
0xxxxh
01234h
01084h
01082h
01080h 0xxxxh
01080h
0108Ch
R5
R6
Register
After:
0xxxxh