Texas Instruments MSP430x4xx - Manual (Page 23)

System Reset and Initialization
2-5 System Resets, Interrupts, and Operating Modes
2.2 Interrupts
The interrupt priorities are fixed and defined by the arrangement of the
modules in the connection chain as shown in Figure 2−3. The nearer a module
is to the CPU/NMIRS, the higher the priority. Interrupt priorities determine what
interrupt is taken when more than one interrupt is pending simultaneously.
There are three types of interrupts:
- System reset
- (Non)-maskable NMI
- Maskable
Figure 2−3. Interrupt Priority
Bus
Grant
Module
1
Module
2
WDT
Timer
Module
m
Module
n
1 2 1 2 1 2 1 2 1
NMIRS
GIE
CPU
OSCfault
Reset/NMI
PUC
Circuit
PUC
WDT Security Key
Priority High
Low
MAB − 5LSBs
GMIRS
Flash Security Key
Flash ACCV