Texas Instruments MSP430x4xx User Manual
Page 77
Instruction Set
3-43
RISC 16−Bit CPU
* INV[.W]
Invert destination
* INV.B
Invert destination
Syntax
INV
dst
INV.B
dst
Operation
.NOT.dst −> dst
Emulation
XOR
#0FFFFh,dst
Emulation
XOR.B
#0FFh,dst
Description
The destination operand is inverted. The original contents are lost.
Status Bits
N: Set if result is negative, reset if positive
Z: Set if dst contained 0FFFFh, reset otherwise
Set if dst contained 0FFh, reset otherwise
C: Set if result is not zero, reset otherwise ( = .NOT. Zero)
Set if result is not zero, reset otherwise ( = .NOT. Zero)
V: Set if initial destination operand was negative, otherwise reset
Mode Bits
OSCOFF, CPUOFF, and GIE are not affected.
Example
Content of R5 is negated (twos complement).
MOV
#00AEh,R5 ;
R5 = 000AEh
INV
R5
; Invert R5,
R5 = 0FF51h
INC
R5
; R5 is now negated,
R5 = 0FF52h
Example
Content of memory byte LEO is negated.
MOV.B
#0AEh,LEO ;
MEM(LEO) = 0AEh
INV.B
LEO
; Invert LEO,
MEM(LEO) = 051h
INC.B
LEO
; MEM(LEO) is negated, MEM(LEO) = 052h