Texas Instruments MSP430x4xx - Manual (Page 227)

Timer_A Operation
12-18 Timer_A
TAIV Software Example
The following software example shows the recommended use of TAIV and the
handling overhead. The TAIV value is added to the PC to automatically jump
to the appropriate routine.
The numbers at the right margin show the necessary CPU cycles for each
instruction. The software overhead for different interrupt sources includes
interrupt latency and return-from-interrupt cycles, but not the task handling
itself. The latencies are:
- Capture/compare block TACCR0 11 cycles
- Capture/compare blocks TACCR1, TACCR2 16 cycles
- Timer overflow TAIFG 14 cycles
; Interrupt handler for TACCR0 CCIFG. Cycles
CCIFG_0_HND
; ... ; Start of handler Interrupt latency 6
RETI 5
; Interrupt handler for TAIFG, TACCR1 and TACCR2 CCIFG.
TA_HND ... ; Interrupt latency 6
ADD &TAIV,PC ; Add offset to Jump table
ā
3
RETI ; Vector 0: No interrupt 5
JMP CCIFG_1_HND ; Vector 2: TACCR1 2
JMP CCIFG_2_HND ; Vector 4: TACCR2 2
RETI ; Vector 6: Reserved 5
RETI ; Vector 8: Reserved 5
TAIFG_HND ; Vector 10: TAIFG Flag
... ; Task starts here
RETI 5
CCIFG_2_HND ; Vector 4: TACCR2
... ; Task starts here
RETI ; Back to main program 5
CCIFG_1_HND ; Vector 2: TACCR1
... ; Task starts here
RETI ; Back to main program 5