Texas Instruments MSP430x4xx - Manual (Page 43)

Addressing Modes
3-9 RISC 16-Bit CPU
3.3 Addressing Modes
Seven addressing modes for the source operand and four addressing modes
for the destination operand can address the complete address space with no
exceptions. The bit numbers in Table 3−3 describe the contents of the As
(source) and Ad (destination) mode bits.
Table 3−3. Source/Destination Operand Addressing Modes
As/Ad Addressing Mode Syntax Description
00/0 Register mode Rn Register contents are operand
01/1 Indexed mode X(Rn) (Rn + X) points to the operand. X
is stored in the next word.
01/1 Symbolic mode ADDR (PC + X) points to the operand. X
is stored in the next word. Indexed
mode X(PC) is used.
01/1 Absolute mode &ADDR The word following the instruction
contains the absolute address. X
is stored in the next word. Indexed
mode X(SR) is used.
10/− Indirect register
mode @Rn Rn is used as a pointer to the
operand.
11/− Indirect
autoincrement @Rn+ Rn is used as a pointer to the
operand. Rn is incremented
afterwards by 1 for .B instructions
and by 2 for .W instructions.
11/− Immediate mode #N The word following the instruction
contains the immediate constant
N. Indirect autoincrement mode
@PC+ is used.
The seven addressing modes are explained in detail in the following sections.
Most of the examples show the same addressing mode for the source and
destination, but any valid combination of source and destination addressing
modes is possible in an instruction.
Note: Use of Labels EDE, TONI, TOM, and LEO
Throughout MSP430 documentation EDE, TONI, TOM, and LEO are used
as generic labels. They are only labels. They have no special meaning.