Figure 19−1. lcd_a controller block diagram – Texas Instruments MSP430x4xx User Manual

Page 353

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LCD_A Controller Introduction

19-3

LCD_A Controller

Figure 19−1. LCD_A Controller Block Diagram

VLCDREFx

Display

Memory

20x

8−bits

Segment

Output

Control

Mux

Analog

Voltage

Multiplexer

Timing

Generator

COM0

COM2

COM1

COM3

S0

S1

Common

Output

Control

S39

S38

SEG0

SEG1

SEG38

SEG39

Mux

Mux

Mux

LCDSx

LCDMXx

LCDSON

LCDON

fLCD

OSCOFF

(from SR)

V1

V2

V3

V4

VD

VC

VB

VA

091h

0A4h

ACLK

32768 Hz

LCDFREQx

Regulated Charge

Pump/

Contrast Control

VLCDx

VLCD

LCDCAP/R33

LCD Bias Generator

V1

VLCD

LCD2B

LCDMXx

V2

V3

V4

LCDCPEN

V5

V5

Divider

/32 .. /512

4

REXT

R23

LCDREF/

R13
R03

R03EXT

10

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