Ie2, interrupt enable register 2, Ifg2, interrupt flag register 2 – Texas Instruments MSP430x4xx User Manual
Page 209
Basic Timer1 Introduction
11-9
Basic Timer1
IE2, Interrupt Enable Register 2
7
6
5
4
3
2
1
0
BTIE
rw−0
BTIE
Bit 7
Basic Timer1 interrupt enable. This bit enables the BTIFG interrupt Because
other bits in IE2 may be used for other modules, it is recommended to set or
clear this bit using
BIS.B
or
BIC.B
instructions, rather than
MOV.B
or
CLR.B
instructions.
0
Interrupt not enabled
1
Interrupt enabled
Bits
6-1
These bits may be used by other modules. See device-specific datasheet.
IFG2, Interrupt Flag Register 2
7
6
5
4
3
2
1
0
BTIFG
rw−0
BTIFG
Bit 7
Basic Timer1 interrupt flag. Because other bits in IFG2 may be used for other
modules, it is recommended to clear BTIFG automatically by servicing the
interrupt, or by using
BIS.B
or
BIC.B
instructions, rather than
MOV.B
or
CLR.B
instructions.
0
No interrupt pending
1
Interrupt pending
Bits
6-1
These bits may be used by other modules. See device-specific datasheet.