Uxrctl, usart receive control register – Texas Instruments MSP430x4xx User Manual
Page 302
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USART Registers: SPI Mode
15-16
USART Peripheral Interface, SPI Mode
UxRCTL, USART Receive Control Register
7
6
5
4
3
2
1
0
FE
Unused
OE
Unused
Unused
Unused
Unused
Unused
rw−0
rw−0
rw−0
rw−0
rw−0
rw−0
rw−0
rw−0
FE
Bit 7
Framing error flag. This bit indicates a bus conflict when MM = 1 and STC
= 0. FE is unused in slave mode.
0
No conflict detected
1
A negative edge occurred on STE, indicating bus conflict
Undefined
Bit 6
Unused
OE
Bit 5
Overrun error flag. This bit is set when a character is transferred into
UxRXBUF before the previous character was read. OE is automatically
reset when UxRXBUF is read, when SWRST = 1, or can be reset by
software.
0
No error
1
Overrun error occurred
Unused
Bit 4
Unused
Unused
Bit 3
Unused
Unused
Bit 2
Unused
Unused
Bit 1
Unused
Unused
Bit 0
Unused
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