Texas Instruments MSP430x4xx - Manual (Page 41)

CPU Registers
3-7 RISC 16-Bit CPU
3.2.4 Constant Generator Registers CG1 and CG2
Six commonly-used constants are generated with the constant generator
registers R2 and R3, without requiring an additional 16-bit word of program
code. The constants are selected with the source-register addressing modes
(As), as described in Table 3−2.
Table 3−2. Values of Constant Generators CG1, CG2
Register As Constant Remarks
R2 00 − − − − − Register mode
R2 01 (0) Absolute address mode
R2 10 00004h +4, bit processing
R2 11 00008h +8, bit processing
R3 00 00000h 0, word processing
R3 01 00001h +1
R3 10 00002h +2, bit processing
R3 11 0FFFFh −1, word processing
The constant generator advantages are:
- No special instructions required
- No additional code word for the six constants
- No code memory access required to retrieve the constant
The assembler uses the constant generator automatically if one of the six
constants is used as an immediate source operand. Registers R2 and R3,
used in the constant mode, cannot be addressed explicitly; they act as
source-only registers.
Constant Generator − Expanded Instruction Set
The RISC instruction set of the MSP430 has only 27 instructions. However, the
constant generator allows the MSP430 assembler to support 24 additional,
emulated instructions. For example, the single-operand instruction:
CLR dst
is emulated by the double-operand instruction with the same length:
MOV R3,dst
where the #0 is replaced by the assembler, and R3 is used with As=00.
INC dst
is replaced by:
ADD 0(R3),dst