Texas Instruments MSP430x4xx - Manual (Page 48)

Addressing Modes
3-14 RISC 16-Bit CPU
3.3.5 Indirect Register Mode
The indirect register mode is described in Table 3−8.
Table 3−8. Indirect Mode Description
Assembler Code Content of ROM
MOV @R10,0(R11) MOV @R10,0(R11)
Length: One or two words
Operation: Move the contents of the source address (contents of R10) to
the destination address (contents of R11). The registers are
not modified.
Comment: Valid only for source operand. The substitute for destination
operand is 0(Rd).
Example: MOV.B @R10,0(R11)
0000h
Address
Space
04AEBh PC
0FF16h
0FF14h
0FF12h
0xxxxh
05BC1h
0xxxxh
0xxh
012h
0xxh
0FA33h
002A7h
R10
R11
Register
Before:
0000h
Address
Space
04AEBh
PC
0FF16h
0FF14h
0FF12h
0xxxxh
05BC1h
0FA34h
0FA32h
0FA30h 0xxxxh
0xxh
05Bh
002A8h
002A7h
002A6h 0xxh
0FA33h
002A7h
R10
R11
Register
After:
0xxxxh 0xxxxh
0xxxxh 0xxxxh
0FA34h
0FA32h
0FA30h
002A8h
002A7h
002A6h