Texas Instruments MSP430x4xx User Manual

Page 98

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Instruction Set

3-64

RISC 16−Bit CPU

* SETN

Set negative bit

Syntax

SETN

Operation

1 −> N

Emulation

BIS

#4,SR

Description

The negative bit (N) is set.

Status Bits

N: Set
Z: Not affected
C: Not affected
V: Not affected

Mode Bits

OSCOFF, CPUOFF, and GIE are not affected.

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