Altera High-Speed Development Kit, Stratix GX Edition - Manual (Page 72)

5–28 Quartus II Version 3.0 Altera Corporation
Nios-Based Tests High-Speed Development Kit, Stratix GX Edition User Guide
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Reinitializing...
[lan91c111] nr_lan91c111_reset: chip id = SMC91C11xFD
[lan91c111] r_lan91c111_detect_phy: found lan83C183 (lan91C111 internal)
[lan91c111] r_lan91c111_init_phy: phy negotiation timed out
[lan91c111] r_lan91c111_init_phy: 10bt
[lan91c111] r_lan91c111_init_phy: half duplex
[dhcp] 1 timing out
[dhcp] 2 timing out
[dhcp] 3 timing out
[dhcp] 4 timing out
[dhcp] 5 timing out
[dhcp] 6 timing out
[dhcp] 7 timing out
[dhcp] 8 timing out
[dhcp] 9 timing out
[dhcp] 10 timing out
[dhcp] 11 timing out
[dhcp] 12 timing out
12. Press reset (Stratix_PB_0) to stop the test.
13. Press Ctrl + C in the shell to exit the test program.
14. If this test passes, write the word “PASS” in the column under
Stratix in the row Stratix Nios Ethernet in the worksheet.
15. Start the on-board flash memory test and EPC16 flash memory test
by typing nr ft.srec r. This command starts the writing and
reading from the on-board flash memory device. Observe the shell
for the proper response. See Figure 5–22.
Figure 5–22. Flash & EPC16 Memory Tests
[SOPC Builder]$ nr ft.srec
nios-run: Ready to download ft.srec over COM1: at 115200 bps
nios-run: Downloading...........................................................
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nios-run: Terminal mode (Control-C exits)
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Erasing Flash Sector for EPC16 One
Erasing Flash Sector for EPC16 Two
Erasing Flash Sector for AMD
Writing 512 shorts to all Flash interfaces