Xilinx 1000BASE-X - Manual (Page 119)

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 119
UG155 March 24, 2008
Management Registers R
.
Management Registers
The contents of the Management Registers can be accessed using the REGAD field of the
MDIO frame. Contents will vary depending on the CORE Generator options, and are
defined in the following sections in this guide.
•
1000BASE-X Standard Using the Optional Auto-Negotiation
•
1000BASE-X Standard Without the Optional Auto-Negotiation
•
SGMII Standard Using the Optional Auto-Negotiation
•
SGMII Standard without the Optional Auto-Negotiation
•
Both 1000BASE-X and SGMII Standards
1000BASE-X Standard Using the Optional Auto-Negotiation
More information on the 1000BASE-X PCS Registers can be found in clause 37 and clause
22 of the IEEE 802.3 specification. Registers at undefined addresses are read-only and
return 0s.
Figure 9-4: Creating an External MDIO Interface
IBUF
IOB LOGIC
IPAD
O I
O
I IO
T
IOPAD
IOB LOGIC
IOBUF
Ethernet 1000BASE-X PCS/PMA
or SGMII LogiCORE
mdc
mdio_tri
mdio_out
mdio_in
mdc
mdio
Table 9-2: MDIO Registers for 1000BASE-X with Auto-Negotiation
Register Address Register Name
0 Control Register
1 Status Register