Xilinx 1000BASE-X - Manual (Page 64)

64 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1
UG155 March 24, 2008
Chapter 5: Using the Client-side GMII Data Path R
Virtex-4 Devices
The logic described previously for Virtex-II and Virtex-II Pro devices does not meet the
input setup and hold requirements for GMII with Virtex-4 devices. Two possible solutions
are:
1. A DCM may be used on the gmii_tx_clk clock path for the Spartan-3 family, as
illustrated in
Figure 5-15 .
2. Input Delay Elements may be used on the GMII data path, as illustrated in Figure 5-16 .
The IODELAY elements can be adjusted to fine-tune the setup and hold times at the
GMII IOB input flip-flops. The delay is applied to the IODELAY element using
constraints in the UCF; these can be edited if desired. See
“Constraints When
Implementing an External GMII” in Chapter 12 for more information.
Figure 5-16: External GMII Transmitter Logic for Virtex-4 Devices
gmii_tx_clk
IBUFG
IOB LOGIC
IPAD
gmii_txd[0]
IBUF
D Q
gmii_tx_en
gmii_tx_er
gmii_txd[0]
gmii_tx_en
gmii_tx_er
BUFG
Ethernet 1000BASE-X
PCS/PMA
or SGMII LogiCORE
IPAD
IPAD
IPAD
IBUF
IBUF
D Q
D Q
gmii_tx_clk_bufg
gmii_txd_int[0]
gmii_tx_en_int
gmii_tx_er_int
Transmitter
Elastic
Buffer
userclk2 (if RocketIO is used)
gtx_clk (if TBI is used)
IDELAY
IDELAY
IDELAY
IDELAY