Figure 2-1, Gmii block, Pcs transmit engine – Xilinx 1000BASE-X User Manual

Page 24: Pcs receive engine and synchronization, Optional auto-negotiation block

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Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

UG155 March 24, 2008

Chapter 2: Core Architecture

R

GMII Block

A client-side GMII is provided with the core, which can be used as an internal interface for
connection to an embedded Media Access Controller (MAC) or other custom logic.
Alternatively, the GMII may be routed to device IOBs to provide an external (off chip)
GMII.

PCS Transmit Engine

The PCS transmit engine converts the GMII data octets into a sequence of ordered sets by
implementing the state diagrams of IEEE 802.3 (figures 36-5 and 36-6). See

Appendix D,

“1000BASE-X State Machines.”

PCS Receive Engine and Synchronization

The synchronization process implements the state diagram of IEEE 802.3 (figure 36-9). The
PCS receive engine converts the sequence of ordered sets to GMII data octets by
implementing the state diagrams of IEEE 802.3 (figures 36-7a and 36-7b). See

Appendix D,

“1000BASE-X State Machines.”

Optional Auto-Negotiation Block

IEEE 802.3 clause 37 describes the 1000BASE-X Auto-Negotiation function that allows a
device to advertise the modes of operation that it supports to a device at the remote end of
a link segment (link partner), and to detect corresponding operational modes that the link
partner may be advertising.

Auto-Negotiation is controlled and monitored through the PCS Management Registers.
See

Chapter 10, “Auto-Negotiation.”

Figure 2-1:

Functional Block Diagram Using RocketIO Transceiver

PCS Transmit Engine

PCS Receive Engine

and Synchronization

Roc

k

e

tIO

T

ranseiv

er

Optional PCS

Management

GMII
to MAC

MDIO
Interface

Optional

Auto-Negotiation

To PMD
Sublayer

GMII Bloc

k

LogiCORE Ethernet 1000BASE-X PCS/PMA or SGMII Core

Roc

k

e

tIO I/F Bloc

k

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