Figure 7-2 – Xilinx 1000BASE-X User Manual

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Ethernet 1000BASE-X PCS/PMA or SGMII v9.1

UG155 March 24, 2008

Chapter 7: 1000BASE-X with RocketIO Transceivers

R

Figure 7-2:

1000BASE-X Connection to Virtex-4 MGT

Ethernet 1000BASE-X

PCS/PMA or SGMII

LogiCORE

Virtex-4

GT11

RocketIO

(used)

TXUSRCLK

TXUSRCLK2

RXUSRCLK

RXUSRCLK2

userclk

userclk2

userclk2 (125MHz)

IPAD

IPAD

brefclkn
(250 MHz)

rxbufstatus[1:0]

rxchariscomma

rxcharisk

rxclkcorcnt[2:0]

rxdata[7:0]

rxrundisp

powerdown

txchardispmode

txchardispval

txcharisk

txdata[7:0]

enablealign

RXBUFERR

RXCHARISCOMMA

RXCHARISK

RXSTATUS[5:0]

RXDATA[7:0]

RXRUNDISP

POWERDOWN

TXCHARDISPMODE

TXCHARDISPVAL

TXCHARISK

TXDATA[7:0]

ENPCOMMAALIGN

ENMCOMMAALIGN

BUFG

Virtex-4

GT11CLK_MGT

MGTCLKP

MGTCLKN

SYNCLK1OUT

RXDISPERR

rxdisperr

LOGIC

SHIM

Cal Block v1.4.1

brefclkp
(250 MHz)

REFCLK1

synclk1

'0'

'0'

TXOUTCLK1

DCLK

DCLK

component_name_block
(Block Level from
example design)

TX_SIGNAL_DETECT

RX_SIGNAL_DETECT

'1'

signal_detect

dclk

BUFG

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