Xilinx 1000BASE-X - Manual (Page 29)

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 29
UG155 March 24, 2008
Core Interfaces R
Figure 2-5 shows the pinout for the Ethernet 1000BASE-X PCS/PMA or SGMII core when
using the TBI with optional PCS Management Registers. The signals shown in the Auto-
Negotiation box are included only when the core includes the Auto-Negotiation
functionality (see
Chapter 3, “Generating and Customizing the Core” ).
).
Figure 2-5: Component Pinout Using the Ten-Bit Interface
with PCS Management Registers
mdc
mdio_in
gmii_rxd[7:0]
gmii_txd[7:0]
gmii_tx_en
tx_code_group[9:0]
rx_code_group0[9:0]
gmii_tx_er
reset
gmii_rx_dv
gmii_rx_er
pma_rx_clk0
GMII
MDIO
phyad[4:0]
gtx_clk signal_detect
mdio_out
mdio_tri
loc_ref
ewrap
pma_rx_clk1
en_cdet
rx_code_group1[9:0]
Ten-Bit Interface (TBI)
gmii_isolate
link_timer_value[8:0]
an_interrupt
Auto_Negotiation
status_vector[4:0]