Rockwell Automation 20D PowerFlex 700S AC Drives with Phase II Control Reference Manual User Manual

Page 107

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Rockwell Automation Publication PFLEX-RM003E-EN-E - January 2011

107

Detailed Drive Operation Chapter 1

• Parameter 237 [RegisLtch0/1 Ctrl] configures the control for registration

latch 0 and 1.

– Set bit 0 “RL0 Arm Req” or 16 “RL1 Arm Req” to arm the registration

logic for the next trigger event. The particular latch will be armed and
ready to be strobed on the next occurrence of the trigger input.

– Set bit 1 “RL0DisarmReq” or 17 “RL1DisarmReq” to disarm the

registration logic for next trigger event.

• Parameter 238 [RegisLtch0/1Stat] indicates the control status of

registration latch 0 and 1.

– Bit 0 “RL0 Armed” or 16 “RL1 Armed” indicates the registration latch

is armed.

– Bit 1 “RL0 Found” or 17 “RL1 Found” indicates the registration event

has triggered the latch.

– Rising edge of “Arm request” will set the “Armed” status bit.
– Rising edge of “Disarm request” will clear the “Armed” status bit.

Encoder 0 Example:

This example will set up registration to capture Encoder 0 position. Digital input
1 will be the trigger.

• Parameter 236 [RegisLtch0/1Cnfg]:

– Bit 0 “RL0 Encoder1” = 0; selects Encoder 0
– Bit 1 “RL0 TrgSrc0” = 0 and 2 “RL0 TrgSrc1” = 1; selects digital input

1 for the trigger

– Bit 3 “RL0 TrgeEdge0” = 0 and 4 “RL0 TrgEdge1” = 0; configures the

registration to capture position on the rising edge of digital input 1

– Bit 5 “RL0 Dir Rev” = 1and 6 “RL0 Dir Fwd” = 1; configures the

registration to capture position when Encoder 1 feedback is forward
(counting up) or reverse (counting down)

– All other bits left at default. Note that bits 16…22 are for the second

registration latch and are not used in this example

• Set parameter 237 [RegisLtch0/1Ctrl], bit 0 “RL0 Arm Req” = 1 to arm

the registration. Parameter 238 [RegisLtch0/1Stat], bit 0 “RL0 Armed”
will be set to 1.

• When digital input 1 turns on, parameter 238 [RegisLtch0/1Stat], bit 1

“RL0 Found” will be set to 1 and parameter 235 [RegisLtch0 Value] will
contain the position counts of Encoder 0 that was captured. Parameter 237
[RegisLtch0/1Ctrl], Bit 0 “RSL0 Arm Req” will be set back to 0 when the
registration is found.

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