Figure 2–19 – Altera DDR Timing Wizard User Manual

Page 37

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background image

Altera Corporation

2–25

November 2007

DDR Timing Wizard User Guide

Getting Started

f

Refer to Appendix A of the

DDR and DDR2 SDRAM

Controller Compiler User Guide

for more information on the

resynchronization and postamble clock cycles and phase
shifts.

Figure 2–19. Resynchronization Clock Connectivity

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