Frame alignment, Lane alignment – Altera JESD204B IP User Manual
Page 47
will be /K28.0/. Similar to the JESD204 TX IP core, the
csr_lane_sync_en
is set to 1 by default, thus the
RX core detects the /K/ character to /R/ character transition. If the
csr_lane_sync_en
is set to 0, the RX
core detects the /K/ character to the first data transition. An ILAS error and unexpected /K/ character is
flagged if either one of these conditions are violated.
When
csr_lane_sync_en
is set to 0, you have to disable data checking for the first 16 octets of data as the
character replacement block takes 16 octets to recover the end-of-frame pointer for character replace‐
ment. When
csr_lane_sync_en
is set to 1 (default JESD204B setting), the number of octets to be
discarded depends on the scrambler or descrambler block.
The receiver assumes that a new frame starts in every F octets. The octet counter is used for frame
alignment and lane alignment.
Related Information
•
Frame Alignment
The frame alignment is monitored through the alignment character /F/. The transmitter inserts this
character at the end of frame. The /A/ character indicates the end of multi-frame. The character replace‐
ment algorithm depends on whether scrambling is enabled or disabled, regardless of the
csr_lane_sync_en
register setting.
The alignment detection process:
• If two successive valid alignment characters are detected in the same position other than the assumed
end of frame—without receiving a valid or invalid alignment character at the expected position
between two alignment characters—the receiver realigns its frame to the new position of the received
alignment characters.
• If lane realignment can result in frame alignment error, the receiver issues an error.
In the JESD204 RX IP core, the same flexible buffer is used for frame and lane alignment. Lane realign‐
ment gives a correct frame alignment because lane alignment character doubles as a frame alignment
character. A frame realignment can cause an incorrect lane alignment or link latency. The course of action
is for the RX to request for reinitialization through
SYNC_N
.
(17)
Lane Alignment
After the frame synchronization phase has entered
FS_DATA
, the lane alignment is monitored via /A/
character (/K28.3/) at the end of multi-frame. The first /A/ detection in the ILAS phase is important for
the RX core to determine the minimum RX buffer release for inter-lane alignment. There are two types of
error that is detected in lane alignment phase:
• Arrival of /A/ character from multiple lanes exceed one multi-frame.
• Misalignment detected during user data phase.
(17)
Dynamic frame realignment and correction is not supported.
4-10
Frame Alignment
UG-01142
2015.05.04
Altera Corporation
JESD204B IP Core Functional Description