Datapath modes, Ip core variation, Datapath modes -3 – Altera JESD204B IP User Manual

Page 8: Ip core variation -3

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Datapath Modes

The JESD204B IP core supports TX-only, RX-only, and Duplex (TX and RX) mode. The IP core is a

unidirectional protocol where interfacing to ADC utilizes the transceiver RX path and interfacing to DAC

utilizes the transceiver TX path.
The JESD204B IP core generates a single link with a single lane and up to a maximum of 8 lanes. If there

are two ADC links that need to be synchronized, you have to generate two JESD204B IP cores and then

manage the deterministic latency and synchronization signals, like SYSREF and SYNC_N, at your custom

wrapper level.
The JESD204B IP core supports duplex mode only if the LMF configuration for ADC (RX) is the same as

DAC (TX) and with the same data rate. This use case is mainly for prototyping with internal serial

loopback mode. This is because typically as a unidirectional protocol, the LMF configuration of converter

devices for both DAC and ADC are not identical.

IP Core Variation

The JESD204B IP core has three core variations:
• JESD204B MAC only

• JESD204B PHY only

• JESD204B MAC and PHY
In a subsystem where there are multiple ADC and DAC converters, you need to use the Quartus II

software to merge the transceivers and group them into the transceiver architecture. For example, to

create two instances of the JESD204B TX IP core with four lanes each and four instances of the JESD204

RX IP core with two lanes each, you can apply one of the following options:
• MAC and PHY option

1. Generate JESD204B TX IP core with four lanes and JESD204B RX IP core with two lanes.

2. Instantiate the desired components.

3. Use the Quartus II software to merge the PHY lanes.

• MAC only and PHY only option—based on the configuration above, there are a total of eight lanes in

duplex mode.
1. Generate the JESD204B Duplex PHY with a total of eight lanes. (TX skew is reduced in this

configuration as the channels are bonded).

2. Generate the JESD204B TX MAC with four lanes and instantiate it two times.

3. Generate the JESD204B RX MAC with two lanes and instantiate it four times.

4. Create a wrapper to connect the JESD204B TX MAC and RX MAC with the JESD204B Duplex

PHY.

Note: If the data rate for TX and RX is different, the transceiver does not allow duplex mode to generate a

duplex PHY. In this case, you have to generate a RX-only PHY on the RX data rate and a TX-only

PHY on the TX data rate.

UG-01142

2015.05.04

Datapath Modes

2-3

About the JESD204B IP Core

Altera Corporation

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