NXP Semiconductors LPC24XX UM10237 - Manual (Page 218)

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User manual Rev. 04 — 26 August 2009 218 of 792
NXP Semiconductors
UM10237
Chapter 11: LPC24XX Ethernet
Table 11–185 shows the signals used for Media Independent Interface Management
(MIIM) of the external PHY.
7. Register description
The software interface of the Ethernet block consists of a register view and the format
definitions for the transmit and receive descriptors. These two aspects are addressed in
the next two subsections.
Table 11–186 lists the registers, register addresses and other basic information. The total
AHB address space required is 4 kilobytes.
After a hard reset or a soft reset via the RegReset bit of the Command register all bits in
all registers are reset to 0 unless stated otherwise in the following register descriptions.
Some registers will have unused bits which will return a 0 on a read via the AHB interface.
Writing to unused register bits of an otherwise writable register will not have side effects.
The register map consists of registers in the Ethernet MAC and registers around the core
for controlling DMA transfers, flow control and filtering.
Reading from reserved addresses or reserved bits leads to unpredictable data. Writing to
reserved addresses or reserved bits has no effect.
Reading of write-only registers will return a read error on the AHB interface. Writing of
read-only registers will return a write error on the AHB interface.
ENET_RX_DV Input Receive data valid.
ENET_RXD[3:0] Input Receive data.
ENET_RX_ER Input Receive error.
ENET_RX_CLK Input Receive clock
ENET_COL Input Collision detect.
ENET_CRS Input Carrier sense.
Table 184. Ethernet RMII pin descriptions
Pin Name Type Pin Description
ENET_TX_EN Output Transmit data enable
ENET_TXD[1:0] Output Transmit data, 2 bits
ENET_RXD[1:0] Input Receive data, 2 bits.
ENET_RX_ER Input Receive error.
ENET_CRS Input Carrier sense/data valid.
ENET_REF_CLK/
ENET_RX_CLK Input Reference clock
Table 185. Ethernet MIIM pin descriptions
Pin Name Type Pin Description
ENET_MDC Output MIIM clock.
ENET_MDIO Input/Output MI data input and output
Table 183. Ethernet MII pin descriptions
Pin Name Type Pin Description