NXP Semiconductors LPC24XX UM10237 User Manual

Page 259

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

259 of 792

NXP Semiconductors

UM10237

Chapter 11: LPC24XX Ethernet

descriptors to be read is determined by the total number of descriptors owned by the
hardware: RxConsumeIndex - RxProduceIndex - 1. Block transferring of descriptors
minimizes memory load. Read data returned from memory is buffered and consumed as
needed.

RX DMA manager receives data

After reading the descriptor, the receive DMA engine waits for the MAC to return receive
data from the (R)MII interface that passes the receive filter. Receive frames that do not
match the filtering criteria are not passed to memory. Once a frame passes the receive
filter, the data is written in the fragment buffer associated with the descriptor. The Rx DMA
does not write beyond the size of the buffer. When a frame is received that is larger than a
descriptor’s fragment buffer, the frame will be written to multiple fragment buffers of
consecutive descriptors. In the case of a multi-fragment reception, all but the last fragment
in the frame will return a status where the LastFrag bit is set to 0. Only on the last
fragment of a frame the LastFrag bit in the status will be set to 1. If a fragment buffer is the
last of a frame, the buffer may not be filled completely. The first receive data of the next
frame will be written to the fragment buffer of the next descriptor.

After receiving a fragment, the Rx DMA manager writes status information back to the
StatusInfo and StatusHashCRC words of the status. The Ethernet block writes the size in
bytes of a descriptor’s fragment buffer in the RxSize field of the Status word. The value of
the RxProduceIndex is only updated after the fragment data and the fragment status
information has been committed to memory, which is checked by an internal tag protocol
in the memory interface. The Rx DMA manager continues to receive frames until the
descriptor array is full. If the descriptor array is full, the Ethernet hardware will set the
RxFinishedInt bit of the IntStatus register. The receive datapath will still be enabled. If the
receive descriptor array is full any new receive data will generate an overflow error and
interrupt.

Update ProduceIndex

Each time the Rx DMA manager commits a data fragment and the associated status word
to memory, it completes the reception of a descriptor and increments the RxProduceIndex
(taking wrap around into account) in order to hand the descriptor back to the device driver
software. Software can re-use the descriptor for new receptions by handing it back to
hardware when the receive data has been processed.

The device driver software can keep track of the progress of the DMA manager by reading
the RxProduceIndex register to see how far along the receive process is. When the Rx
descriptor array is emptied completely, the RxProduceIndex retains its last value.

Write reception status

After the frame has been received from the (R)MII bus, the StatusInfo and
StatusHashCRC words of the frame descriptor are
updated by the DMA manager.

If the descriptor is for the last fragment of a frame (or for the whole frame if there are no
fragments), then depending on the success or failure of the frame reception, error flags
(Error, NoDescriptor, Overrun, AlignmentError, RangeError, LengthError, SymbolError, or
CRCError) are set in StatusInfo. The RxSize field is set to the number of bytes actually
written to the fragment buffer, -1 encoded. For fragments not being the last in the frame
the RxSize will match the size of the buffer. The hash CRCs of the destination and source

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