NXP Semiconductors LPC24XX UM10237 - Manual (Page 75)

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User manual Rev. 04 — 26 August 2009 75 of 792
NXP Semiconductors
UM10237
Chapter 5: LPC24XX External Memory Controller (EMC)
10. Register description
This chapter describes the EMC registers and provides details required when
programming the microcontroller. The EMC registers are shown in
Table 5–67 .
CLKOUT[1:0] Output Follows CCLK Follows CCLK SDRAM clocks. Used for SDRAM
devices.
CKEOUT[3:0] Output 0xF 0x0 SDRAM clock enables. Used for
SDRAM devices. One is allocated for
each Chip Select.
DQMOUT[3:0] Output 0xF 0xF Data mask output to SDRAMs. Used
for SDRAM devices and static
memories.
Table 66. Pad interface and control signal descriptions
Name Type Value on POR
reset Value during
self-refresh Description
Table 67. Summary of EMC registers
Address Register Name Description Warm
Reset
Value
[1]
POR
Reset
Value
[1]
Type
0xFFE0 8000 EMCControl Controls operation of the memory controller. 0x1 0x3 R/W
0xFFE0 8004 EMCStatus Provides EMC status information. - 0x5 RO
0xFFE0 8008 EMCConfig Configures operation of the memory controller - 0x0 R/W
0xFFE0 8020 EMCDynamic Control Controls dynamic memory operation. - 0x006 R/W
0xFFE0 8024 EMCDynamic Refresh Configures dynamic memory refresh operation. - 0x0 R/W
0xFFE0 8028 EMCDynamic ReadConfig Configures the dynamic memory read strategy. - 0x0 R/W
0xFFE0 8030 EMCDynamicRP Selects the precharge command period. - 0x0F R/W
0xFFE0 8034 EMCDynamic RAS Selects the active to precharge command period. - 0xF R/W
0xFFE0 8038 EMCDynamic SREX Selects the self-refresh exit time. - 0xF R/W
0xFFE0 803C EMCDynamic APR Selects the last-data-out to active command time. - 0xF R/W
0xFFE0 8040 EMCDynamic DAL Selects the data-in to active command time. - 0xF R/W
0xFFE0 8044 EMCDynamicWR Selects the write recovery time. - 0xF R/W
0xFFE0 8048 EMCDynamicRC Selects the active to active command period. - 0x1F R/W
0xFFE0 804C EMCDynamic RFC Selects the auto-refresh period. - 0x1F R/W
0xFFE0 8050 EMCDynamic XSR Selects the exit self-refresh to active command time. - 0x1F R/W
0xFFE0 8054 EMCDynamic RRD Selects the active bank A to active bank B latency. - 0xF R/W
0xFFE0 8058 EMCDynamic MRD Selects the load mode register to active command time. - 0xF R/W
0xFFE0 8080 EMCStatic ExtendedWait Selects time for long static memory read and write
transfers. - 0x0 R/W
0xFFE0 8100 EMCDynamic Config0 Selects the configuration information for dynamic
memory chip select 0. - 0x0 R/W
0xFFE0 8104 EMCDynamic RasCas0 Selects the RAS and CAS latencies for dynamic memory
chip select 0. - 0x303 R/W
0xFFE0 8120 EMCDynamic Config1 Selects the configuration information for dynamic
memory chip select 1. - 0x0 R/W