NXP Semiconductors LPC24XX UM10237 - Manual (Page 70)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 70 of 792
NXP Semiconductors
UM10237
Chapter 5: LPC24XX External Memory Controller (EMC)
The functions of the EMC blocks are described in the following sections:
• AHB slave register interface.
• AHB slave memory interfaces.
• Data buffers.
• Memory controller state machine.
• Pad interface.
Note: For 32 bit wide chip selects data is transferred to and from dynamic memory in
SDRAM bursts of four. For 16 bit wide chip selects SDRAM bursts of eight are used.
5.1 AHB slave register interface
The AHB slave register interface block enables the registers of the EMC to be
programmed. This module also contains most of the registers and performs the majority of
the register address decoding.
To eliminate the possibility of endianness problems, all data transfers to and from the
registers of the EMC must be 32 bits wide.
Note: If an access is attempted with a size other than a word (32 bits), it causes an
ERROR response to the AHB bus and the transfer is terminated.
Fig 15. EMC block diagram
A[23:0]
D[31:0]
WE
OE
BLS[3:0]
CS[3:0]
DYCS[3:0]
CAS
RAS
CLKOUT[1:0]
CKEOUT[3:0]
DQMOUT[3:0]
static
memory
signals
dynamic
memory
signals
shared
signals
MEMORY
CONTROLLER
STATE
MACHINE
DATA
BUFFERS
AHB SLAVE
REGISTER
INTERFACE
AHB SLAVE
MEMORY
INTERFACE
EMC
AH
B
B
u
s
P
A
D I
N
T
E
RF
A
C
E