NXP Semiconductors LPC24XX UM10237 - Manual (Page 401)

UM10237_4 © NXP B.V. 2009. All rights reserved.
User manual Rev. 04 — 26 August 2009 401 of 792
NXP Semiconductors
UM10237
Chapter 15: LPC24XX USB OTG controller
[1] Bits 0 and 1 of this register are used to control the routing of the USB pins to ports 1 and 2 in device-only
applications (see
Section 13–9.1.1 ).
7.1 USB Interrupt Status Register (USBIntSt - 0xE01F C1C0)
The USB OTG controller has seven interrupt lines. This register allows software to
determine their status with a single read operation.
The interrupt lines are ORed together to a single channel of the vectored interrupt
controller.
OTGIntSet 0xFFE0 C108 WO OTG Interrupt Set
OTGIntClr 0xFFE0 C10C WO OTG Interrupt Clear
OTGStCtrl [1] 0xFFE0 C110 R/W OTG Status and Control
OTGTmr 0xFFE0 C114 R/W OTG Timer
I 2 C registers
I2C_RX 0xFFE0 C300 RO I2C Receive
I2C_TX 0xFFE0 C300 WO I2C Transmit
I2C_STS 0xFFE0 C304 RO I2C Status
I2C_CTL 0xFFE0 C308 R/W I2C Control
I2C_CLKHI 0xFFE0 C30C R/W I2C Clock High
I2C_CLKLO 0xFFE0 C310 WO I2C Clock Low
Clock control registers
OTGClkCtrl 0xFFE0 CFF4 R/W OTG clock controller
OTGClkSt 0xFFE0 CFF8 RO OTG clock status
Table 362. USB OTG and I 2 C register address definitions
Name Address Access Function
Table 363. USB Interrupt Status register - (USBIntSt - address 0xE01F C1) bit description
Bit Symbol Description Reset
Value
0 USB_INT_REQ_LP Low priority interrupt line status. This bit is read only. 0
1 USB_INT_REQ_HP High priority interrupt line status. This bit is read only. 0
2 USB_INT_REQ_DMA DMA interrupt line status. This bit is read only. 0
3 USB_HOST_INT USB host interrupt line status. This bit is read only. 0
4 USB_ATX_INT External ATX interrupt line status. This bit is read only. 0
5 USB_OTG_INT OTG interrupt line status. This bit is read only. 0
6 USB_I2C_INT I 2 C module interrupt line status. This bit is read only. 0
7 - Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined. NA
8 USB_NEED_CLK USB need clock indicator. This bit is read only. 0
30:9 - Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined. NA
31 EN_USB_INTS Enable all USB interrupts. When this bit is cleared, the
VIC does not see the ORed output of the USB interrupt
lines. 1