1 port select register, Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual

Page 337

Advertising
background image

UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

337 of 792

NXP Semiconductors

UM10237

Chapter 13: LPC24XX USB device controller

[1]

Reset value reflects the data stored in used bits only. It does not include reserved bits content.

[2]

The USBPortSel register is identical to the OTGStCtrl register (see

Section 15–7.6

). In device-only operations only bits 0 and 1 of this

register are used to control the routing of USB pins to port 1 or port 2.

[3]

Reading WO register will return an invalid value.

9.1 Port select register

9.1.1 USB Port Select register (USBPortSel - 0xFFE0 C110)

This register selects the USB port pins the USB device signals are routed to. USBPortSel
is a read/write register.

USBEpInd

USB Endpoint Index

WO

[3]

0x0000 0000

0xFFE0 C248

USBMaxPSize

USB MaxPacketSize

R/W

0x0000 0008

0xFFE0 C24C

USB transfer registers

USBRxData

USB Receive Data

RO

0x0000 0000

0xFFE0 C218

USBRxPLen

USB Receive Packet Length

RO

0x0000 0000

0xFFE0 C220

USBTxData

USB Transmit Data

WO

[3]

0x0000 0000

0xFFE0 C21C

USBTxPLen

USB Transmit Packet Length

WO

[3]

0x0000 0000

0xFFE0 C224

USBCtrl

USB Control

R/W

0x0000 0000

0xFFE0 C228

SIE Command registers

USBCmdCode

USB Command Code

WO

[3]

0x0000 0000

0xFFE0 C210

USBCmdData

USB Command Data

RO

0x0000 0000

0xFFE0 C214

DMA registers

USBDMARSt

USB DMA Request Status

RO

0x0000 0000

0xFFE0 C250

USBDMARClr

USB DMA Request Clear

WO

[3]

0x0000 0000

0xFFE0 C254

USBDMARSet

USB DMA Request Set

WO

[3]

0x0000 0000

0xFFE0 C258

USBUDCAH

USB UDCA Head

R/W

0x0000 0000

0xFFE0 C280

USBEpDMASt

USB Endpoint DMA Status

RO

0x0000 0000

0xFFE0 C284

USBEpDMAEn

USB Endpoint DMA Enable

WO

[3]

0x0000 0000

0xFFE0 C288

USBEpDMADis

USB Endpoint DMA Disable

WO

[3]

0x0000 0000

0xFFE0 C28C

USBDMAIntSt

USB DMA Interrupt Status

RO

0x0000 0000

0xFFE0 C290

USBDMAIntEn

USB DMA Interrupt Enable

R/W

0x0000 0000

0xFFE0 C294

USBEoTIntSt

USB End of Transfer Interrupt Status

RO

0x0000 0000

0xFFE0 C2A0

USBEoTIntClr

USB End of Transfer Interrupt Clear

WO

[3]

0x0000 0000

0xFFE0 C2A4

USBEoTIntSet

USB End of Transfer Interrupt Set

WO

[3]

0x0000 0000

0xFFE0 C2A8

USBNDDRIntSt

USB New DD Request Interrupt Status

RO

0x0000 0000

0xFFE0 C2AC

USBNDDRIntClr

USB New DD Request Interrupt Clear

WO

[3]

0x0000 0000

0xFFE0 C2B0

USBNDDRIntSet

USB New DD Request Interrupt Set

WO

[3]

0x0000 0000

0xFFE0 C2B4

USBSysErrIntSt

USB System Error Interrupt Status

RO

0x0000 0000

0xFFE0 C2B8

USBSysErrIntClr

USB System Error Interrupt Clear

WO

[3]

0x0000 0000

0xFFE0 C2BC

USBSysErrIntSet

USB System Error Interrupt Set

WO

[3]

0x0000 0000

0xFFE0 C2C0

Table 293. Summary of USB device registers

…continued

Name

Description

Access

Reset value

[1]

Address

Advertising