12 half-duplex mode backpressure, Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

267 of 792

NXP Semiconductors

UM10237

Chapter 11: LPC24XX Ethernet

Transmit flow control is enabled via the ‘TX FLOW CONTROL’ bit in the MAC1
configuration register. If the ‘TX FLOW CONTROL’ bit is zero, then the MAC will not
transmit pause control frames, software must not initiate pause frame transmissions, and
the TxFlowControl bit in the Command register should be zero.

Transmit flow control example

Figure 11–32

illustrates the transmit flow control.

In this example, a frame is received while transmitting another frame (full duplex.) The
device driver detects that some buffer might overrun and enables the transmit flow control
by programming the PauseTimer and MirrorCounter fields of the FlowControlCounter
register, after which it enables the transmit flow control by setting the TxFlowControl bit in
the Command register.

As a response to the enabling of the flow control a pause control frame will be sent after
the currently transmitting frame has been transmitted. When the pause frame
transmission completes the internal mirror counter will start counting bit slots; as soon as
the counter reaches the value in the MirrorCounter field another pause frame is
transmitted. While counting the transmit datapath will continue normal transmissions.

As soon as software disables transmit flow control a zero pause control frame is
transmitted to resume the receive process.

9.12 Half-Duplex mode backpressure

When in half-duplex mode, backpressure can be generated to stall receive packets by
sending continuous preamble that basically jams any other transmissions on the Ethernet
medium. When the Ethernet block operates in half duplex mode, asserting
the TxFlowControl bit in the Command register will result in applying continuous preamble
on the Ethernet wire, effectively blocking traffic from any other Ethernet station on the
same segment.

Fig 32. Transmit Flow Control

MirrorCounter

(1/515 bit

slots)

400

0

150

300

200

450

350

250

50

100

500

PauseTimer

MirrorCounter

TxFlowCtl

clear

TxFlowCtl

pause control

frame

transmission

pause control

frame

transmission

pause control

frame

transmission

normal transimisson

normal receive

normal

transmission

normal receive

(R)MII

receive

(R)MII

transmit

device driver

register

writes

pause in effect

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