2 control register definitions, Shown in, Table 11–204 – NXP Semiconductors LPC24XX UM10237 User Manual

Page 228: Nxp semiconductors

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

228 of 792

NXP Semiconductors

UM10237

Chapter 11: LPC24XX Ethernet

The station address is used for perfect address filtering and for sending pause control
frames. For the ordering of the octets in the packet please refer to

Figure 11–27

.

7.1.17 Station Address 2 Register (SA2 - 0xFFE0 0048)

The Station Address 2 register (SA2) has an address of 0xFFE0 0048. The bit definition of
this register is shown in

Table 11–205

.

The station address is used for perfect address filtering and for sending pause control
frames. For the ordering of the octets in the packet please refer to

Figure 11–27

.

7.2 Control register definitions

7.2.1 Command Register (Command - 0xFFE0 0100)

The Command register (Command) register has an address of 0xFFE0 0100. Its bit
definition is shown in

Table 11–206

.

Table 204. Station Address register (SA1 - address 0xFFE0 0044) bit description

Bit

Symbol

Function

Reset
value

7:0

STATION ADDRESS,
4th octet

This field holds the fourth octet of the station address.

0x0

15:8

STATION ADDRESS,
3rd octet

This field holds the third octet of the station address.

0x0

31:16

-

Unused

0x0

Table 205. Station Address register (SA2 - address 0xFFE0 0048) bit description

Bit

Symbol

Function

Reset
value

7:0

STATION ADDRESS,
6th octet

This field holds the sixth octet of the station address.

0x0

15:8

STATION ADDRESS,
5th octet

This field holds the fifth octet of the station address.

0x0

31:16

-

Unused

0x0

Table 206. Command register (Command - address 0xFFE0 0100) bit description

Bit

Symbol

Function

Reset
value

0

RxEnable

Enable receive.

0

1

TxEnable

Enable transmit.

0

2

-

Unused

0x0

3

RegReset

When a ’1’ is written, all datapaths and the host registers are
reset. The MAC needs to be reset separately.

0

4

TxReset

When a ’1’ is written, the transmit datapath is reset.

0

5

RxReset

When a ’1’ is written, the receive datapath is reset.

0

6

PassRuntFrame

When set to ’1’, passes runt frames smaller than 64 bytes to
memory unless they have a CRC error. If ’0’ runt frames are
filtered out.

0

7

PassRxFilter

When set to ’1’, disables receive filtering i.e. all frames
received are written to memory.

0

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