Section 16–4.10, Nxp semiconductors – NXP Semiconductors LPC24XX UM10237 User Manual

Page 434

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UM10237_4

© NXP B.V. 2009. All rights reserved.

User manual

Rev. 04 — 26 August 2009

434 of 792

NXP Semiconductors

UM10237

Chapter 16: LPC24XX UART0/2/3

4.9 UARTn Scratch Pad Register (U0SCR - 0xE000 C01C, U2SCR -

0xE007 801C U3SCR - 0xE007 C01C)

The UnSCR has no effect on the UARTn operation. This register can be written and/or
read at user’s discretion. There is no provision in the interrupt interface that would indicate
to the host that a read or write of the UnSCR has occurred.

4.10 UARTn Auto-baud Control Register (U0ACR - 0xE000 C020, U2ACR -

0xE007 8020, U3ACR - 0xE007 C020)

The UARTn Auto-baud Control Register (UnACR) controls the process of measuring the
incoming clock/data rate for the baud rate generation and can be read and written at
user’s discretion.

Table 388. UARTn Scratch Pad Register (U0SCR - address 0xE000 C01C,

U2SCR - 0xE007 801C, U3SCR - 0xE007 C01C) bit description

Bit Symbol Description

Reset
Value

7:0 Pad

A readable, writable byte.

0x00

Table 389. UARTn Auto-baud Control Register (U0ACR - 0xE000 C020, U2ACR -

0xE007 8020, U3ACR - 0xE007 C020) bit description

Bit

Symbol

Value Description

Reset value

0

Start

This bit is automatically cleared after auto-baud
completion.

0

0

Auto-baud stop (auto-baud is not running).

1

Auto-baud start (auto-baud is running).Auto-baud run
bit. This bit is automatically cleared after auto-baud
completion.

1

Mode

Auto-baud mode select bit.

0

0

Mode 0.

1

Mode 1.

2

AutoRestart 0

No restart.

0

1

Restart in case of time-out (counter restarts at next
UART0 Rx falling edge)

0

7:3

-

NA

Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.

0

8

ABEOIntClr

End of auto-baud interrupt clear bit (write only
accessible). Writing a 1 will clear the corresponding
interrupt in the UnIIR. Writing a 0 has no impact.

0

9

ABTOIntClr

Auto-baud time-out interrupt clear bit (write only
accessible). Writing a 1 will clear the corresponding
interrupt in the UnIIR. Writing a 0 has no impact.

0

31:10 -

NA

Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.

0

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