NXP Semiconductors LPC24XX UM10237 - Manual (Page 734)

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User manual Rev. 04 — 26 August 2009 734 of 792
NXP Semiconductors
UM10237
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
8.2 Programming the GPDMA for scatter/gather DMA
To program the GPDMA for scatter/gather DMA:
1. Write the LLIs for the complete DMA transfer to memory. Each linked list item contains
four words:
– Source address.
– Destination address.
– Pointer to next LLI.
– Control word.
The last LLI has its linked list word pointer set to 0. The LLIs must be stored in the
memory where the GPDMA has access to (i.e. AHB1 SRAM and external memory).
2. Choose a free DMA channel with the priority required. DMA channel 0 has the highest
priority and DMA channel 1 the lowest priority.
3. Write the first linked list item, previously written to memory, to the relevant channel in
the GPDMA.
4. Write the channel configuration information to the channel Configuration Register and
set the Channel Enable bit. The GPDMA then transfers the first and then subsequent
packets of data as each linked list item is loaded.
5. An interrupt can be generated at the end of each LLI depending on the Terminal
Count bit in the DMACCxControl Register. If this bit is set an interrupt is generated at
the end of the relevant LLI. The interrupt request must then be serviced and the
relevant bit in the DMACIntTCClear Register must be set to clear the interrupt.
8.3 Example of scatter/gather DMA
See Figure 32–146 for an example of an LLI. A rectangle of memory has to be transferred
to a peripheral. The addresses of each line of data are given, in hexadecimal, at the
left-hand side of the figure. The LLIs describing the transfer are to be stored contiguously
from address 0x20000.
The first LLI, stored at 0x20000, defines the first block of data to be transferred, which is
the data stored between addresses 0x0A200 and 0x0AE00:
Fig 146. LLI example
0x--200 0x–E00
0x0A---
0x0B---
0x0C---
0x0D---
0x0E---
0x0F---
0x10---
0x11---