Rockwell Automation 1772-L8_LW_LWP_LX_LXP,D17726.5.8 User Manual - Manual (Page 152)

Timers and Counters
Chapter 11
11-7
A counter counts the number of events that occur and stores this count in
its accumulated value word. Counters can be located anywhere in the data
table. An event is defined as a false-to-true transition. Counter
instructions have no time base.. The last counter address for each is
listed below:
This Processor Has This Last
Timer/Counter Address:
MiniĆPLCĆ2/02 3477
MiniĆPLCĆ2/16 7477
MiniĆPLCĆ2/17 17077
The upper four bits in the accumulated value (AC) word are status bits:
This Bit: Contains This Information:
14 Overflow/underflow bit. It is set when the AC value of the CTU instruction
exceeds 999 or when the AC value of the CTD instruction falls below 000.
15 Count complete bit. it is set when the AC value > PR value.
16 Enable bit for CTD instruction. It is set when the rung condition is true.
17 Enable bit for CTU instruction. It is set when the rung condition is true.
There are three types of counter instructions available with the controller:
up counter
down counter
counter reset
An Up Counter instruction increments its accumulated value for each
false-to-true transition of the rung condition. The rung condition must go
from true to false and back to true before the next count is registered.
010
00
CTU
030
PR 150
AC 000
When the rung condition becomes:
True
Accumulated value increments by 1.
Bit 14 is set if the AC > 999.
Bit 15 is set when AC > PR. Incrementing the accumulated value
continues after the preset value is reached.
Bit 17 is set and stays set until the rung goes false.
Counter Instructions
Up Counter