BECKHOFF EtherCAT IP Core for Altera FPGAs v3.0.10 - Manual (Page 15)

Overview
Slave Controller – IP Core for Altera FPGAs III-3
1.2 Scope of this document
Purpose of this document is to describe the installation and configuration of the EtherCAT IP Core for
Altera FPGAs. Furthermore, the signals and registers of the IP Core depending on the chosen
configuration are described.
This documentation was made with the assumption that the user is familiar with the handling of the
Altera Quartus
® Development Environment.
1.3 Scope of Delivery
The EtherCAT IP Core installation file includes:

EtherCAT IP Core (encrypted VHDL library)

Example designs
The following files which contain customer specific information are required to synthesize the IP Core.
They are delivered independently of the installation file.

License File to decrypt EtherCAT IP Core: license_<company>_<Dongle/MAC ID>_<date>.dat

Encrypted Vendor ID package: pk_ECAT_VENDORID_<company>_Altera.vhd