BECKHOFF EtherCAT IP Core for Altera FPGAs v3.0.10 - Manual (Page 54)

IP Core Configuration
III-42 Slave Controller – IP Core for Altera FPGAs
5.2.5.1 No Interface and General Purpose I/O
If there is no interface selected no communication with the application is possible (except for general
purpose I/O).
Figure 14: Register Process Data Interface
Number of GPIOs
General purpose I/O signals can be added to any selected PDI. The number of GPIO bytes is
configurable to 0, 1, 2, 4, or 8 Bytes. Both general purpose outputs and general purpose inputs of the
selected width are available.