Motorola 68P02958C00-B - Manual (Page 325)

Software Diagnostics Output
C-33
18. The number of empty frames ready to be received.
19. The number of frames received.
20. The number of frames transmitted.
21. The number of empty frames directed to transmission.
## 286
UART hardware control and status :-
Internal software data (key)
(DATA) : %% 1
Internal hardware registers (IREG) : %% 2
Internal hardware parameters (IRAM) : %% 3
Scc configuration register (SCON) : %% 4
Scc mode register (SCM) : %% 5
Scc data sync. register (DSR) : %% 6
Scc event register (SCCE) : %% 7
Reserved register (RES2) : %% 8
Scc mask register (SCCM) : %% 9
Reserved register (RES3) : %% 10
Scc status register (SCCS) : %% 11
Idle characters maximum (MAX_IDL) : %% 12
Idle characters counter (IDLC) : %% 13
Break characters register (BRKCR) : %% 14
Parity error counter (PAREC) : %% 15
Framing error counter (FRMEC) : %% 16
Noise error counter (NOSEC) : %% 17
Break error counter (BRKEC) : %% 18
User defined UART addresses (UADDRX) : %% %% 19
Control character register (RCCR) : %% 20
Control character table (CHARACTERX) : %% %% %% %% 21
: %% %% %% %%
1. Device key address.
2. H-W registers address.
3. H-W parameters address.
4. Determines the clock direction (Rx or Tx) and the baud rate
5. Determines the work mode — HDLC or UART.
6. Determines the HDLC flags.
7. The events that generate the interrupt.
8. Reserved.
9. Mask to block the interrupt.
10. Reserved.
11. The CM (Channel Monitor) and TD (Tone Detect) statuses.
12. How many idles to wait before declaring that the transmission has ended.