SMSC LAN9312 - Manual (Page 145)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 145 Revision 1.4 (08-19-08)
DATASHEET
10.2.3.2 ERASE (Erase Location)
If erase/write operations are enabled in the EEPROM, this command will erase the location selected
by the EPC_ADDRESS field of the
EEPROM Command Register (E2P_CMD) . The EPC_TIMEOUT
bit is set if the EEPROM does not respond within 30mS.
EWDS 1 00 0 0 X X X X X X X - Hi-Z 12
EWEN 1 00 1 1 X X X X X X X - Hi-Z 12
READ 1 10 A8 A7 A6 A5 A4 A3 A2 A1 A0 - D7 - D0 20
WRITE 1 01 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 - D0 (RDY/~BSY) 20
WRAL 1 00 0 1 X X X X X X X D7 - D0 (RDY/~BSY) 20
Table 10.6 Microwire Command Set for 11 Address Bits
INST
START
BIT OPCODE ADDRESS
DATA TO
EEPROM
DATA FROM
EEPROM
# OF
CLOCKS
ERASE 1 11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 - (RDY/~BSY) 14
ERAL 1 00 1 0 X X X X X X X X X - (RDY/~BSY) 14
EWDS 1 00 0 0 X X X X X X X X X - Hi-Z 14
EWEN 1 00 1 1 X X X X X X X X X - Hi-Z 14
READ 1 10 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 - D7 - D0 22
WRITE 1 01 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 - D0 (RDY/~BSY) 22
WRAL 1 00 0 1 X X X X X X X X X D7 - D0 (RDY/~BSY) 22
Figure 10.7 EEPROM ERASE Cycle
Table 10.5 Microwire Command Set for 9 Address Bits (continued)
INST
START
BIT OPCODE ADDRESS
DATA TO
EEPROM
DATA FROM
EEPROM
# OF
CLOCKS
1
EECLK
EEDI
EEDO
EECS
1 1 Ax A0