SMSC LAN9312 - Manual (Page 325)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 325 Revision 1.4 (08-19-08)
DATASHEET
14.5.2.4 Port x MAC Receive 64 Byte Count Register (MAC_RX_64_CNT_x)
This register provides a counter of 64 byte packets received by the port. The counter is cleared upon
being read.
Note: A bad packet is defined as a packet that has an FCS or Symbol error. For this counter, a packet
that is not an integral number of bytes is rounded down to the nearest byte.
Register #: Port0: 0411h Size: 32 bits
Port1: 0811h
Port2: 0C11h
BITS DESCRIPTION TYPE DEFAULT
31:0 RX 64 Bytes
Count of packets (including bad packets) that have exactly 64 bytes.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
RC 00000000h