SMSC LAN9312 - Manual (Page 458)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08) 458 SMSC LAN9312
DATASHEET
Chapter 17 Revision History
Table 17.1 Customer Revision History
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION
Rev. 1.3
(07-03-08)
Wake-Up Frame Detection
section of Host MAC
Chapter and MAC_CR
register description Added note at end of WUFF section and to the
BCAST bit of the MAC_CR register stating:
When wake-up frame detection is enabled via the
WUEN bit of the HMAC_WUCSR register, a
broadcast wake-up frame will wake-up the device
despite the state of the Disable Broadcast Frames
(BCAST) bit in the HMAC_CR register.
HMAC_WUCSR register Fixed error in GUE bit description: “....the MAC
Address [1:0] bits...” changed to “...the MAC
Address [0] bits....”.
Port x PHY Special
Control/Status Register
(PHY_SPECIAL_CONTROL
_STATUS_x) on page 306 Updated RESERVED bits 11:5 definition to
“RESERVED - Write as 0000010b, ignore on
read”, changed default to 0000010b, and made
field R/W.
Port x PHY Auto-Negotiation
Advertisement Register
(PHY_AN_ADV_x) on page
293 Bits 15 and 9 made RESERVED.
Section 15.6, "Clock
Circuit," on page 453 Changed minimum drive level from 0.5mW to
300uW