SMSC LAN9312 - Manual (Page 345)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 345 Revision 1.4 (08-19-08)
DATASHEET
14.5.2.24 Port x MAC Transmit Flow Control Settings Register (MAC_TX_FC_SETTINGS_x)
This read/write register configures the flow control settings of the port.
Register #: Port0: 0441h Size: 32 bits
Port1: 0841h
Port2: 0C41h
BITS DESCRIPTION TYPE DEFAULT
31:18 RESERVED RO -
17:16 Backoff Reset RX/TX
Half duplex-only. Determines when the truncated binary exponential backoff
attempts counter is reset.
00 = Reset on successful transmission (IEEE standard)
01 = Reset on successful reception
1X = Reset on either successful transmission or reception
R/W 00b
15:0 Pause Time Value
The value that is inserted into the transmitted pause packet when the switch
wants to “XOFF” its link partner. R/W FFFFh