SMSC LAN9312 - Manual (Page 155)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 155 Revision 1.4 (08-19-08)
DATASHEET
11.1.2 Block Diagram
The LAN9312 IEEE 1588 implementation is illustrated in Figure 11.1 , and consists of the following
major function blocks:
„ IEEE 1588 Time Stamp
These three identical blocks provide time stamping functions on all switch fabric ports.
„ IEEE 1588 Clock
This block provides a 64-bit tunable clock that is used as the time source for all IEEE 1588 time
stamp related functions.
„ IEEE 1588 Clock/Events
This block provides IEEE 1588 clock comparison-based interrupt generation and time stamp related
GPIO event generation.
Figure 11.1 IEEE 1588 Block Diagram
10/100
PHY
Ethernet
10/100
PHY
MII
Ethernet
IEEE 1588
Time Stamp
MII
To Host MAC
IEEE 1588
Time Stamp
IEEE 1588 Time Stamp
Sync / Delay_Req
Msg Detect RX
Sync / Delay_Req
Msg Detect TX
Clock Capture RX
Src UUID Capture RX
Sequence ID Capture RX
IRQ Flag
Clock Capture TX
Src UUID Capture TX
Sequence ID Capture TX
IRQ Flag
RX
TX
TX: Sync for Master, Delay_Req for Slave
RX: Delay_Req for Master, Sync for Slave
host
IEEE 1588 Clock
64 Bit Clock
carry
32 Bit Accumulator
32 Bit Addend
+
inc
host
IEEE 1588 Clock Events
Clock Capture GPIO8
IRQ Flag
GPIO[8:9]
(Inputs)
Clock Capture GPIO9
IRQ Flag
64 Bit Clock Target
IRQ Flag
compare >=
64 Bit Reload / Add
load / add
GPIO[8:9]
(Outputs)
host
Switch Fabric
IRQ Enables
X9
To INT_STS register IRQ Flags
Po
rt
2
Po
rt 0 Po
rt 1 MII