SMSC LAN9312 - Manual (Page 213)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 213 Revision 1.4 (08-19-08)
DATASHEET
14.2.5.13 1588 Clock High-DWORD Register (1588_CLOCK_HI)
This read/write register combined with 1588 Clock Low-DWORD Register (1588_CLOCK_LO) form the
64-bit 1588 Clock value. The 1588 Clock value is used for all 1588 timestamping. The 1588 Clock has
a base frequency of 100MHz, which can be adjusted via the
1588 Clock Addend Register
(1588_CLOCK_ADDEND) accordingly. Refer to Chapter 11, "IEEE 1588 Hardware Time Stamp Unit,"
on page 154 for additional information.
Note: Both this register and the 1588 Clock Low-DWORD Register (1588_CLOCK_LO) must be
written for either to be affected.
Note: The value read is the saved value of the 1588 Clock when the 1588_CLOCK_SNAPSHOT bit
in the
1588 Command Register (1588_CMD) is set.
Offset: 170h Size: 32 bits
BITS DESCRIPTION TYPE DEFAULT
31:0 Clock High (CLOCK_HI)
This field contains the high 32-bits of the 64-bit 1588 Clock. R/W 00000000h