SMSC LAN9312 - Manual (Page 429)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 429 Revision 1.4 (08-19-08)
DATASHEET
14.5.4.18 Buffer Manager Port 2 Egress Rate Priority Queue 0/1 Register (BM_EGRSS_RATE_20_21)
This register, along with the Buffer Manager Configuration Register (BM_CFG) , is used to configure
the egress rate pacing.
Register #: 1C11h Size: 32 bits
BITS DESCRIPTION TYPE DEFAULT
31:26 RESERVED RO -
25:13 Egress Rate Port 2 Priority Queue 1
These bits specify the egress data rate for the Port 2 priority queue 1. The
rate is specified in time per byte. The time is this value plus 1 times 20nS. R/W 00000h
12:0 Egress Rate Port 2 Priority Queue 0
These bits specify the egress data rate for the Port 2 priority queue 0. The
rate is specified in time per byte. The time is this value plus 1 times 20nS. R/W 00000h