SMSC LAN9312 - Manual (Page 343)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 343 Revision 1.4 (08-19-08)
DATASHEET
14.5.2.22 Port x MAC Receive Control Frame Count Register (MAC_RX_CTLFRM_CNT_x)
This register provides a counter of good packets with a type field of 8808h. The counter is cleared
upon being read.
Note: A bad packet is one that has an FCS or Symbol error.
Register #: Port0: 0423h Size: 32 bits
Port1: 0823h
Port2: 0C23h
BITS DESCRIPTION TYPE DEFAULT
31:0 RX Control Frame
Count of good packets (proper length and free of errors) that have a type
field of 8808h.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
RC 00000000h