SMSC LAN9312 - Manual (Page 361)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 361 Revision 1.4 (08-19-08)
DATASHEET
14.5.2.40 Port x MAC Transmit Single Collision Count Register (MAC_TX_SNGLECOL_CNT_x)
This register provides a counter of transmitted packets which experienced exactly 1 collision. The
counter is cleared upon being read.
Register #: Port0: 0461h Size: 32 bits
Port1: 0861h
Port2: 0C61h
BITS DESCRIPTION TYPE DEFAULT
31:0 TX Excessive Collision
Count of transmitted packets that experienced exactly 1 collision. This
counter is incremented only in half-duplex operation.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 573 hours.
RC 00000000h