SMSC LAN9312 - Manual (Page 278)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08) 278 SMSC LAN9312
DATASHEET
14.3.7 Host MAC MII Data Register (HMAC_MII_DATA)
This read/write register is used in conjunction with the Host MAC MII Access Register
(HMAC_MII_ACC) to access the internal PHY registers. This register contains either the data to be
written to the PHY register specified in the HMAC_MII_ACC Register, or the read data from the PHY
register whose index is specified in the HMAC_MII_ACC Register.
Offset: 7h Size: 32 bits
BITS DESCRIPTION TYPE DEFAULT
31:16 RESERVED RO -
15:0 MII Data
This field contains the 16-bit value read from the PHY read operation or the
16-bit data value to be written to the PHY before an MII write operation. R/W 0000h