SMSC LAN9312 - Manual (Page 337)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 337 Revision 1.4 (08-19-08)
DATASHEET
14.5.2.16 Port x MAC Receive Fragment Error Count Register (MAC_RX_FRAG_CNT_x)
This register provides a counter of received packets of less than 64 bytes and a FCS error. The counter
is cleared upon being read.
Register #: Port0: 041Dh Size: 32 bits
Port1: 081Dh
Port2: 0C1Dh
BITS DESCRIPTION TYPE DEFAULT
31:0 RX Fragment
Count of packets that have less than 64 bytes and a FCS error.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 115 hours.
RC 00000000h