SMSC LAN9312 - Manual (Page 335)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 335 Revision 1.4 (08-19-08)
DATASHEET
14.5.2.14 Port x MAC Receive Broadcast Count Register (MAC_RX_BRDCST_CNT_x)
This register provides a counter of valid received packets with a broadcast destination address. The
counter is cleared upon being read.
Note: A bad packet is one that has a FCS or Symbol error.
Register #: Port0: 041Bh Size: 32 bits
Port1: 081Bh
Port2: 0C1Bh
BITS DESCRIPTION TYPE DEFAULT
31:0 RX Broadcast
Count of valid packets (proper length and free of errors) that have a
broadcast destination address.
Note: This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
RC 00000000h