SMSC LAN9312 - Manual (Page 414)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08) 414 SMSC LAN9312
DATASHEET
14.5.4.4 Buffer Manager Flow Control Resume Level Register (BM_FC_RESUME_LVL)
This register configures the buffer usage level when a Pause frame with a pause value of 1 is sent.
Register #: 1C03h Size: 32 bits
BITS DESCRIPTION TYPE DEFAULT
31:16 RESERVED RO -
15:8 Resume Level Low
These bits specify the buffer usage level during times when 2 or 3 ports are
active.
Each buffer is 128 bytes.
Note: A port is “active” when 36 buffers are in use for that port.
R/W 03h
7:0 Resume Level High
These bits specify the buffer usage level during times when 0 or 1 ports are
active.
Each buffer is 128 bytes.
Note: A port is “active” when 36 buffers are in use for that port.
R/W 07h