SMSC LAN9312 - Manual (Page 419)

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312 419 Revision 1.4 (08-19-08)
DATASHEET
14.5.4.9 Buffer Manager Reset Status Register (BM_RST_STS)
This register indicates when the Buffer Manager has been initialized by the reset process.
Note 14.63 The default value of this bit is 0 immediately following any switch fabric reset and then self-
sets to 1 once the ALR table is initialized.
Register #: 1C08h Size: 32 bits
BITS DESCRIPTION TYPE DEFAULT
31:1 RESERVED RO -
0 BM Ready
When set, indicates the Buffer Manager tables have finished being initialized
by the reset process. The initialization is performed upon any reset that
resets the switch fabric. RO
SS
Note 14.63