Samsung S3F401F - Manual (Page 12)

S3F401F_UM_REV1.00 MICROCONTROLLER ix
List of Figures
Figure Title Page
Number Number
1-1 S3F401F Block Diagram ..............................................................................................1-3
1-2 S3F401F Package Pin Assignments (100-QFP-1420) ................................................1-4
2-1 A/D Converter Block Diagram......................................................................................2-2
2-2 ADC Operation Flow Chart ..........................................................................................2-6
3-1 Basic Timer Block Diagram..........................................................................................3-1
4-1
Encoder Counter Block Diagram .................................................................................4-2
4-2 Position Counter Operation..........................................................................................4-3
5-1
Flash Memory Controller Read/Write Block Diagram ..................................................5-1
5-2 Normal Program Flowchart ..........................................................................................5-4
5-3 Option Program Flowchart ...........................................................................................5-5
5-4 Sector Erase Flowchart................................................................................................5-6
5-5 Chip Erase Flowchart...................................................................................................5-7
6-1
Inverter Motor Controller (IMC) Block Diagram ...........................................................6-2
6-2 Inverter Motor Controller (IMC) Signal generation (Tri-angular wave) ........................6-3
6-3 Inverter Motor Controller (IMC) Signal generation (Saw-tooth wave)..........................6-4
6-4 Inverter Motor Controller (IMC) Signal generation (Tri-angular wave) ........................6-5
7-1
S3F401F Interrupt Structure ........................................................................................7-2
9-1
Clock State Machine Diagram .....................................................................................9-2
9-2 Clock Circuit Diagram ..................................................................................................9-3
9-3 PLL (Phase-Locked Loop) Block Diagram...................................................................9-5
9-4 Capacitor for PLL Loop Filter .......................................................................................9-5